Liquid crystal displays (LCD) and other displays address each pixel individually to form an image. Often the pixels are addressed by row and column. In one embodiment, as each row is addressed, a data signal is sent to a column driver for the pixels along the row as indexed by the column. The data signal must be offset from the column driver clock to allow the data signal time (tsetup) to setup prior to the clock edge and time (thold) to hold subsequent to the clock edge to ensure that the data is properly and accurately conveyed by the column driver. Conventionally, a delay line is inserted to delay the data signal relative to the clock. The delay line often includes a number of selectable delay periods. The desired delay period is selected during manufacture of the display.